Monday, July 25, 2016

Software Receiver Design Tutorials Progress

S O F T W A R E   R E C E I V E R   D E S I G N   N O T E S / T U T O R I A L

This page contains links to all of my tutorials. I don't want to call them pure tutorials, because I don't baby the reader through the process I went through, rather, I'm trying to document the process I experienced in learning and implementing a software radio system in hope that I help somebody who is in my position, curious about this somewhat advanced topic and has tried hunting for the information, but have opened Pandora's box of questions after reading them. Sometimes they are wrong. But hopefully, my material will reinforce other things learnt from other people's material and I want to capture the difficulties that I encountered, because a polished paper has inherently eliminated that.
  • Motivation for Software PLL
    • Discusses the problems and questions that arose from me trying to learn about software PLLs from other people's websites. Me learning about Software PLLs ultimately led to me to learning about software receivers.
  • Tutorial 0 - Pulse Amplitude Modulation
    • The code that I wrote to turn a 'string' into a sequence of discrete [-3, -1, 1, 3] pulses. 
  • Software Receiver Design Textbook

Sunday, July 24, 2016

Nasty Python Code

import numpy as np
import itertools

def letters2pam(s):
        return list(itertools.chain(*[[int(pair[0] + pair[1],2)*2-3 for pair in np.reshape(list('{:08b}'.format(ord(c))),(4,2))]  for c in s]))

Saturday, July 16, 2016

M O D E L I N G    T H E    P E A K   D E T E C T O R

How do we account for the behavior of the peak detector the Z-transform? My idea is to inject a sinusoid at increasing amplitudes and plot the average output values against the input amplitudes.

The input frequency was 1 kHz. 

It's almost linear, the slop is a little less than 1.

What about its frequency response?

The input amplitude is 1 for all the sinusoids tested.

Great, I think I'm just going to assume a gain of 1, and flat frequency response.
However, it takes some time for an input sinusoid's amplitude to appear at the output. And for this, I think I will just use Z^(-D), where D is the number of samples you must wait for the sinusoid's amplitude to appear at the output, which depends on its frequency and sampling rate. [Edit] I actually just didn't bother with taking this into account. I'm just going to cross my fingers.

~M O D E L L I N G   T H E   S Y S T E M   I N   M A T L A B~

With the gain/behavior of the process in mind, lets turn our attention to the digital control system. Before we start writing code, we should use math and analyze the stability of the system. 

Using Matlab, I simulated the step response of the system that I showed earlier. It's steady state response was off by half! Which meant, that I needed an integrator.

In the following, I will show the loop responding to a unit step input. Each plot depicts a loop with a specific gain setting.
~K = 0.5~

~K = 1~

~K = 1.5~


 I didn't expect the program to behave the way it did. But hey, that is engineering. I ended up having to iteratively tune the loop gain and peak detector time constant. Initially, with all of the values discussed above, with the loop gain equalling 0.5, 1.0, 1.5, made the loop unstable, this was due to the peak detector's delay. Above, I said I would deal with it when I got to the implementation. Well, the delay mattered in the end. I had to tune the loop gain down to 0.1, and make the peak detector's time constant smaller. (If I were to use a peak detector circuit as an analogue, I made lowered the resistor's resistance so that it can drain the capacitor faster. This way, the loop reacts faster to changes made to the input sinusoid's amplitude).

Time for pictures, and then maybe code.
Input sinusoid frequency = 1 kHz
Reference amplitude = 10

Monday, July 4, 2016

Simulating a Peak Detector in the Sampled Domain

D I G I T A L   P E A K   D E T E C T O R

I'm using this blog as documentation for myself and as a resource for other people who want to accomplish similar or the same thing as I am trying to do, which is to make a software PLL all in code, that synchronizes to a digital input signal.

In an effort to jot down things quickly, and because I'm lazy, I'm going to cut to the chase. I'm trying to build an auto gain digital control system to equalize an input signal to the PLL I have yet to build. As you can imagine, if input [carrier] were a sampled audio signal or data from a SDR, it could have any amplitude.

I don't know if any of my ideas will work, but I'm jotting them down as I go. I'm not coming back.

~Q U E S T I O N S   T H A T   I   A S K E D   M Y S E L F~

I asked the following questions to myself:
  • What is the process you are trying to control?
    • The input power.
  • What is the process's input and output?
    • input = its volume, output = output power.
  • What is your reference?
    • The desired output power.
Quick Sketch of AGC system:

~I M P L E M E N T I N G   T H E   P R O C E S S / P L A N T~

Now I will talk about my approach to the Process/Plant.
The input to the process is the volume, which results in an output power. Volume is easy, I just multiply the input sample by a gain factor. Output power/amplitude? In circuits, I would use a peak detector with RC tank attached. 

The diode is simulated with an if statement in code. If the input voltage is greater than the output voltage, the output voltage becomes the input voltage. Otherwise, let the difference equation do its thing, which is exponentially decay. 

The following is the resistor capacitor parallel tank derivation.

 I'd love to be a better teacher right now and baby you through the MATLAB code but here it is:

Sick. This is a good warmup for the big PLL.